To resolve them, two design methods of board level dynamic BS chain based on boundary scan technology are proposed in this paper.

为了解决上述问题，文中提出了两种基于边界扫描技术的板级动态链路设计方法。

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On the basis of research on the bound ary-scan architecture and TAP controller, the paper implements a design for a t ap interface based on JTAG specification in a test system.

该文在研究边界扫描体系结构和TAP接口控制器的基础上，在一个测试系统中，实现了基于JTAG规范的主ta P接口设计。

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In This paper, based on analysis of the untested factors of the sequence cell, presents a design method, which the test logic inserted, before the scan design.

文中首先分析了时序元件的不可测因素，提出了扫描设计前增加测试逻辑的设计方法。

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